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Microchip Technology /ATSAMV71J19B /ISI /IDR

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Interpret as IDR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (DIS_DONE)DIS_DONE 0 (SRST)SRST 0 (VSYNC)VSYNC 0 (PXFR_DONE)PXFR_DONE 0 (CXFR_DONE)CXFR_DONE 0 (P_OVR)P_OVR 0 (C_OVR)C_OVR 0 (CRC_ERR)CRC_ERR 0 (FR_OVR)FR_OVR

Description

ISI Interrupt Disable Register

Fields

DIS_DONE

Disable Done Interrupt Disable
SRST

Software Reset Interrupt Disable
VSYNC

Vertical Synchronization Interrupt Disable
PXFR_DONE

Preview DMA Transfer Done Interrupt Disable
CXFR_DONE

Codec DMA Transfer Done Interrupt Disable
P_OVR

Preview Datapath Overflow Interrupt Disable
C_OVR

Codec Datapath Overflow Interrupt Disable
CRC_ERR

Embedded Synchronization CRC Error Interrupt Disable
FR_OVR

Frame Rate Overflow Interrupt Disable

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data